Jocelyn Wang

Jocelyn Wang is a Hardware Performance Engineer in the Lenovo Infrastructure Solutions Group Performance Laboratory based in Taipei, Taiwan. She is responsible for performance validation of the PCIe bus and network subsystem, including the RDMA/TCP/UDP protocols on Lenovo ThinkSystem servers. Jocelyn holds a Master's Degree in Biomedical Electronics and Bioinformatics from the National Taiwan University in Taiwan.